The SPPDG has a dual-bay, 1500 square foot, Class 100 clean room (Figures EA-1 and EA-2) for microelectronics prototype assembly, inspection, rework, and failure analysis. The Class 100 assembly laboratory is sufficiently clean to support critical tasks such as thin film spin coating and mask alignment, and exposure for photolithography.


The SPPDG is involved in a broad range of assembly tasks.
Integrated circuit (IC) wafers from 3" to 8" in diameter can be thinned from their nominal 50 mil thickness down to as little as 2 mils (as required by the systems application ), and then scribed or sawed into individual IC die. These die can be attached "face up" into single chip packages or multichip modules (MCMs) using eutectic solder reflow or epoxy die attachment methods, or attached "face down" using flip chip die attachment methods. For "face up" mounting, the power, ground and signal pins on the die can be connected to the IC package or MCM utilizing automatic wire bonding (both wedge and ball types). For "face down" mounting, the bare die can be "bumped" with gold balls in our facility to facilitate attachment, with two different methods available to conduct the bumping operation. Our Karl Suss Model FC-150 flip-chip attachment unit can perform flip-chip attachment of bare die onto multichip module (MCM) substrates with 1-3 micrometer accuracy in both X- and Y-dimensions (see Figure EA-3). The flip-chip bonder also incorporates special software which allows us to pick and place a large number of bare die onto a substrate with up to a 6" x 6" grid, with chip placement accuracy of approximately 10 micrometer s in X- and Y-dimensions, a capability which was specially developed in our laboratory in support of several recent free-space optics research programs. Vacuum ovens exist for epoxy cure and substrate bake. A plasma oven provides a substrate cleaning capability. We have the necessary equipment to package integrated circuits in single chip packages (Figures EA-4 and EA-5) with either vacuum or nitrogen backfill, and the ability to seam-seal the lids onto the individual chip packages.
Surface mount attachment of packaged discretes, ICs, connectors, etc. is performed utilizing a screen printer for epoxies and solders, a manual pick and place machine (also used in die attach), manual epoxy/solder dispense machines, a solder reflow belt oven (IR hood and convection belt heating), and manual assembly operations. A substrate degreaser is also available.
Assembly of through-hole and edge mounted parts is accomplished manually with various tools.



Rework and failure analysis can be performed for all assembly processes, in some cases on bare substrates and bare die by utilizing the following capabilities:

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